Build a resistance network
For a uniform layer under one-dimensional steady heat flow, R = t/(kA). Use meters for thickness and square meters for area. Add series resistances only when the heat follows the same path; parallel paths and spreading require a more complete model.
Choose a defensible area
The full board area is rarely the correct area directly beneath a small die. Copper and ceramic spread heat laterally, so the effective area changes through the stack. Using total board area can dramatically understate local temperature rise. Use an analytical spreading model or validated simulation when geometry matters.
Measure the assembled design
Interface thickness, voids, mounting pressure and cooling boundary conditions can dominate uncertainty. Correlate temperature measurements with the model and state sensor location. A case temperature and a junction temperature are different quantities. Treat transient operation separately from steady-state estimates.
Engineering example
At 20 W, an ideal layer resistance of 0.25 K/W produces a 5 K drop across that layer. It does not mean the die is only 5 K above ambient; all other thermal resistances still contribute.
Before you release the design
- Use temperature-appropriate conductivity.
- Include die attach and heat-sink interface.
- Validate hot spots and cooling assumptions.
Sources and further technical reading
Manufacturer references support the material and process context. Worked examples and checklists are engineering guidance; they are not test results or supplier guarantees.